Downloads
Please complete the form to gain instant access to the files.
This approach dramatically improves simulation performance while maintaining compliance with the SystemC standard.
61st ACM/IEEE Design Automation Conference (DAC), 2024
In the face of growing complexity in automotive systems, this paper unveils a novel framework that combines QEMU and SystemC TLM-2.0 to create high-performance virtual ECUs. This allows automotive companies to efficiently validate ECU software before hardware prototypes are available, enhancing safety, reducing costs, and speeding up time-to-market.
DVCon Europe, 2023
Accelerate your code coverage analysis for embedded software with NQC², an innovative QEMU plugin. Bypass traditional bare-metal limitations and extract runtime coverage information without target-software instrumentation, achieving up to 8.5x better performance than comparable approaches.
RAPIDO, 2024
Meet SIM-V, a high-performance RISC-V simulator that revolutionizes early software development and verification. With its custom JIT engine, SIM-V enables swift and thorough verification of large target software stacks in Continuous Integration scenarios.
DVCon Europe, 2022
As hardware-software systems become increasingly complex, ensuring software quality in safety-critical domains is critical. This paper presents a novel approach to improve the performance of Level 4 virtual Electronic Control Units (L4 vECUs) using QEMU and SystemC TLM, achieving a remarkable 1000x speedup in testing.
DVCon Japan, 2024
Discover the potentials of open-source Virtual Platforms and learn how the Virtual Components Modeling Library (VCML) simplifies prototyping, development, and debugging, enabling scalable and efficient software and hardware integration.
DVCon Europe, 2023